Introductions of the embedded network acquisition card
l FPGA + ARM architecture + high-speed synchronous four-channel 100MSPS AD acquisition + high-speed four-channel 500MSPS DAC signal output is a system. The system can perform high-speed AD acquisition and high-speed DAC output at the same time, arm is dual-core 1G main frequency, FPGA is Xilinx xc7z020, DDR3 memory 1G
High-speed dual-channel AD is 14 bits, input coupled DC, synchronous sampling rate is up to 100MSPS, 3db bandwidth is greater than 150M, signal input range is plus or minus 1V or plus or minus 5V (welding option) High-speed dual-channel DAC is 16 bits, update rate is 500MSPS
The network card of the acquisition board is a Gigabit network port, and the sampling rate can be set by the dll library of the upper computer and the lower computer of the arm.
The board has a synchronous sma clock interface, which can collect multiple boards synchronously and transmit data through a network switch
The whole set of boards can work under Win7-32 bit, Win7-64 bit, Windows-xp, Win8, supply voltage 5V DC or 12V DC, normal working power is not more than 6 W
The upper computer and arm lower computer can obtain the AD acquisition value of each channel in real time and control the DAC output value and obtain the output value for data analysis
Open the qt application source code of the arm lower computer and the c ++ source code and network port communication protocol of the host computer dll dynamic library, provide the arm lower computer qt and the host computer c ++ test program, test the above functions of the board, and provide the source code
Board with VGA interface, USB interface, you can connect the mouse to operate the lower computer, you can connect the external display
Multi-channel analog signals are collected and used at high speed, and signals can be generated independently
Performance parameter
Industry Classification: Industrial Electronics
Development platform: Freescale Freescale, NXP NXP, TI Texas Instruments
Delivery form: PCBA
Performance parameters: FPGA + ARM architecture + high-speed synchronous four-channel 100MSPS AD acquisition + high-speed four-channel 500MSPS DAC signal output as a system.
Application scenario: Various high-precision and high-reliability industrial control, health care and intelligent building data acquisition applications
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